资源列表
vender1
- Vending Machine Controller Verilog Source Code
Synchronous
- 同步加法计数器，采用D触发器实现的二进制计数器-Synchronous adding counters, D flip-flop implemented using binary counter
UART_rec
- 用Verilog语言写的串口接收程序。通过串口助手发送数据，在数据输出端可以看到发送的数据。（需要自己分配FPGA引脚)-Verilog language used to write the serial receiver. Send data through the serial port assistant. It can be seen at the data output terminal of the data transmission. (Need to assign your ow
gold
- SRL16是Virtex器件中的一个移位寄存器查找表。它有4个输入用来选择输出序列的长度。使用XCV50-6器件实现，共占用5个Slice。用来生成gold码。-SRL16 Virtex devices is a shift register lookup table. It has four input used to select the output sequence length. Use XCV50-6 device, occupying a total of five Slice.
IDTContrl
- 该Verilog程序提供了一种控制IDT系列Ram的读写操作程序，每次读写750个16位的数。-The Verilog program control IDT provides a series of read and write operating procedures Ram, 750 each to read and write the number 16.
ziandzifu
- lcd12864 全屏显示 汉字加字符-lcd12864 full screen characters plus characters
CORDIC_design_digital_computers
- CORDIC算法设计的数字计算机，基于Verilog设计-CORDIC algorithm based on the design of digital computer, Verilog design code
vga
- vga显示代码，能够实现彩色条纹显示。还有一个小球弹动的显示。-vga display code can be displayed in color stripes. There is also a bouncing ball display.
fashengqi
- 通过读取rom的方式，调频调幅选择波形的信号发生器。已经调试过 verilong-based on rom to create a kind of generator which can change frequency, amptilude and waveform.
mult_para_recurs_8x8_2sC
- mult_para_recurs_8x8_2sC verilog hdl代码写成的
count_plus_last
- 对电机的编码器输入的正交编码信号进行4倍频处理 ，生成一个新的计数脉冲 ，同时判断电机的转动方向，输出一个方向标志电平信号，从而可以让DSP知道电机的转速和方向。-On the motor encoder inputs of the quadrature encoder signals 4 octave treatment, generates a new pulse count and at the same time to determine the direction of motor r
sram_test
- fpga读写SRAM的VERILOG 代码-the verilog code of fpga write/read sram