资源列表
DigiClock_v1.0
- 多功能数字钟：包含默认模式、设置模式、闹钟模式和跑表模式。已在ISE10.1工具烧录成功，烧录开发板Xilinx Spartan 3 xc3s400 pq205 speed -4 开发板烧录成功-Multi-function digital clock: contains the default mode, setting mode, alarm mode and stopwatch mode. The source code has been successfully burned in IS
fpga-example1
- 集中了十几个vhdl经典程序,如lcd,led控制程序和多种接口程序-focus of a dozen VHDL classic procedures, such as LCD, led control procedures and multiple interface program
17869318fpga-example1
- FPGA实例包含UARTverilog TLC7524接口电路程序 TLC5510 VHDL控制程序 DAC0832 接口电路程序 LCD控制VHDL程序与仿真等-FPGA interface circuit examples include UARTverilog TLC7524 TLC5510 VHDL process control procedures procedures DAC0832 LCD control interface circuit and simulation of V
readback_crc.7z
- FPGA回读CRC功能,下载FPGA之后如果要检验CRC是否正确，可以使用这个功能，属于XILINX的PRIMITIVE原语，使用非常方便-FPGA readback CRC
cpld_ccd
- 实现基于CPLD的CCD采集系统设计的VHDL源码，编译通过，-Implementation of the CCD acquisition system based on CPLD design of VHDL source code, compiles,
VHDL-0.1s-Timer
- 该程序完成了在altera de2 环境下实现0.1s新型计时器，该计时器可以运用于广大体育赛事中，有开关、暂停开始键、复位键。-The program completed the implementation in altera de2 0.1s under the new timer, which can be applied to the majority of sports events, a switch, pause start button, reset button.
pic16f877a_lcd
- this a lCD Disply Program-this is a lCD Disply Program
CH3CH2CH1VHDL 数字电路参考书所有程序3
- CH2CH1VHDL 数字电路参考书所有程序3-CH2CH1VHDL digital circuit reference all three procedures
LCD
- LCd驱动液晶屏，分为两个模块，一个控制，一个驱动亲测可用-LCD driver LCD screen, pro-test available
vhdl-serial
- 精品串口代码，有多种不同设置，数据位、停止位、检验位可调。-Boutique serial code, there are a variety of different settings, data bits, stop bits, parity bit adjustable.
DCT
- 用verilog语言实现DCT编解码 附有DCT的说明