资源列表
CompletethedirectsequencespreadspectrumsystemPNpre
- 完成直接序列扩频系统的伪码精确同步，并用FPGA进行实现-Complete the direct sequence spread spectrum system PN precise synchronization, and implementation with FPGA for
jiaotongdeng
- VHDL书写的交通灯设计，适合初学者参考-Writing VHDL design of traffic lights, suitable for beginners reference
1553_enc_dec
- 1553B的编解码程序很好用给大家分享 -the series 1553B decoder procedure is useful for everyone to share share
2x4_decoder
- 2*4 decoder program in verilog
wordfile
- 这个文件中是UltraEdit的一些格式化文件说明 由于原来的 UltraEdit 不支持 HDL 语言的格式化显示，把文件解压得到的 wordfile.txt替换其安装目录下的 wordfile.txt 文件即可
fdiv7
- 程序实现对输入时钟信号的7分频，程序采用两个计数器，一个由输入时钟的上升沿触发，另一个由时钟的下降沿触发，最后将2个计数器的输出相或，即得到占空比为50 的方波。-Program realizes frequency devision-by-7 of the input clock signal , the program uses two counters, one triggered by the rising edge of the input clock, and the other t
usb_wr_Verilog
- fpga ubs通讯模块 verlog语言 使用EZ-USB FX2-USB interface. use EZ-USB FX2 carry out PC communication with FPGA by USB.
electronic-lock
- electronic lock by C language and simulation file by proteus software. in this project by using a keypad and alphabetic lcd 2*16 which are attached to a 8051 micro controller, an electronik lock is implemented. first of all read the help file.
TLC5615DA
- 基于TLC5615DA正弦信号发生器，成功显示并输出波形-Based on TLC5615DA sinusoidal signal generator, a successful display and output waveform
PWM
- PWM examples in VHDL
hamin0132
- 汉明码的编结码模块，用verilog写成，为Modelsim下的一个工程。-series guitar code modules, using Verilog languages, as Modelsim of a project.