资源列表
fifo-1117
- 这是异步FIFO的VHDL实现代码，已经在FPGA上通过实践证明，运行状态良好
code
- 本源码是基于VHDL语言环境下的基础实验源码，共分七个部分。分别是：序列检测器、数字密码锁、四位有符号数除法、同步FIFO、DPLL的设计以及Cordic 算法实现。对于VHDL的初学者具有极大的参考价值。-The source is based on experimental basis source VHDL language environment, it is divided into seven sections. They are: the sequence detector, di
SpWIF
- spacewire 总线收发接口源代码，VHDL，适用于Xilinx，测试FPGA：XC3S1000FTG256-4C-spacewire bus transceiver interface, the source code, VHDL, applicable to Xilinx, testing FPGA: XC3S1000FTG256-4C
ddscordic
- ddscordic.rar文件，有关直接频率合成器的similink下搭建模块电路-ddscordic.rar
xapp202
- 在ATM应用中实现内容寻址寄存器（CAM）-In the ATM application to achieve content addressable register (CAM)
VHDL_pinlvji
- 频率计的VHDL实现，使用10K20，包括顶层电路图，测频范围：1Hz--10MHz-frequency of VHDL, use 10K20, including top-level circuit, measuring frequency range : 1Hz -- 10MHz
PLD_SRAM
- PLD自增读写SRAM,有好的参照作用，希望大家指点和帮助。-PLD by reading and writing since the SRAM, has reference to the role of good, I hope everyone pointing and help.
yingjiandianziqin
- 实现电子琴播放 数码管显示 附带实验解说和指导-shixiandianziqinbofang shumaguanxianshi
DGAMS
- Its a code guide. a helpful tool to learn VHDL
Micron_SDRAM_DDR2Simulation_mo
- DDR2 SDRAM仿真模型，适合于ModelSim下工作，请先阅读readme,DDR2 SDRAM Simulation Model which is suitable for modelsim. Please read readme file firstly.
4_1mux
- 通过Vhdl语言实现 2—1 mux 并基于 2-1 mux 完成4-1 mux 程序和test bench的编写，测试成功 -2-1 mux realized through Vhdl language based on the 2-1 mux 4-1 mux of procedures and test bench preparation, the test is successful
zlg_avalon_lcd128_64
- 一个NiosII可用的LCD12864 IPcore，含例子-A NiosII available LCD12864 IPcore, with examples