资源列表
quartus.ii.11.0-crack
- 这是最新版的quartus11.0的破解文件，怎么做我就不说了，里面说的很清楚，我已经尝试，保证能用！希望大家学习愉快！ 另外此破解只做内部测试交流，切勿用于商业用途，否则后果自负，请勿广泛传播。-This is the latest version of the quartus11.0 the crack file, how do I do not say, which made it very clear, I have tried, guaranteed to last! Hope y
SSD1963-LCD-controllers-driver
- SSD1963 LCD controllers driver Module for Microchip Graphics Library
sljzjjf
- 十六进制加法器，适合初学者用，上实验课使用杠杠的-Hexadecimal adder, suitable for beginners, on the experimental course using a lever! ! !
multi_CX
- 实现multi-CX的功能，可以经过quartus软件综合，然后映射到FPFGA上面-Achieve multi-CX features, the software can be integrated through quartus then mapped to FPFGA top
fgasd
- day la chuong trinh su dung mcu AVR
inc_pid
- 基于FPGA的增量式PID设计方法，Matlab、Simulink， Xilinx Block set-Incremental PID FPGA-based design methodology
Sdram_Control_4Port
- 使用verilog HDL写的sdram(SDR)的控制器源代码，具有很好的可移植性，试验的例子已经通过QuartusII 9.0编译通过，可以运行在cycloneII上-Controller source code using verilog HDL written in the sdram (SDR), has good portability, test examples via the QuartusII 9.0 compiler, you can run in cycloneII
PIPELINE_MUL_ADD
- 利用2個加法器及2個乘法器加上平行化處理來實現
VHDL_i2cs_rx_CPLD
- CPLD imlementation of I2C BUS Controller. The descr iption has been made by VHDL
fft2
- 512点8位基2fft程序。基于 vhdl/verilog。已仿真布线通过。-512 points, eight base 2fft program. Based on vhdl/verilog. Simulation layout has been adopted.
ug480_7Series_XADC
- xinlinx V7芯片 用verliog 和vhdl 实现自带adc的模拟量采集-xinlinx V7 chip with verliog and vhdl realization comes adc analog acquisition
1
- led blinking program-led blinking program.................