资源列表
digitalclock
- Digital clock 8 segments
hamming
- Códigos Hamming cod 7-3
REQUEST
- Request - Para Sensores
Sensor
- Sensor de Temperatura
Lightflu_cycle
- 使用verilog编程实现流水灯的控制程序实现8位灯的循环流水亮灯-Verilog programming control procedures of the light water recirculating eight lights lit
VHDL_uart
- 用xilinx的FPGA-spartan3E实现uart，固定波特率9600，偶校验，系统时钟50MHz，能够实现将从串口调试助手发送到FPGA的数据重新发回串口调试助手-using xilinx s FPGA-spartan3E to implement uart with a baudrate of 9600, even parity check. The system frequency is 50MHz.It can turn the data from serial assistant
elevator-verilog-code
- SRAM CONTROLLER CAN GIVE YOU CORRET IDEA ABOUT VERILOG
_12_DA[TLC5615]_1
- 通过DA输出正弦波，频率1KHz ad采用的是TLC5615 输出的正弦波与理想波形基本一样-DA output sine wave frequency 1KHz The ad is TLC5615 The sine wave output with the ideal waveform is basically the same
CPLD_AD_AVR
- CPLD程序，程序中实现了PWM波的产生、ADS8364并行高速AD的读写控制，与AVR单片机的通信控制。CPLD以类似外部RAM的方式被AVR读写，AVR单片机只需要向固定的地址写入或者读取即可。 本程序对高速数据采集系统有很好的参考作用，可以以此修改为其他应用场合。-The CPLD program, the program to achieve a PWM wave generation high-speed AD ADS8364 parallel read and write con
fenfshan
- 风扇的verilog控制程序,有强风，弱风，睡眠等各种功能-Verilog control procedures of the fan, strong wind, low wind, sleep and other functions
startup
- Spartan-3E starter开发板入门例程的重新编译版本，本版本使用最新版ISE14.1重新编译。补充缺少的文件，实际测试通过。-Spartan-3E starter development board entry routine re-compiled version, this version use the latest version ISE14.1 recompile. Added missing files, through the actual test.
jijiaqi
- 出租车的计价器，描述了实际出租车的工作状态-Taxi meter, described the state of the actual taxi