资源列表
ceshixiangliang
- vhdl 测试向量含测试向量（Test Bench）和波形产生：VHDL实例---相应加法器的测试向量（test bench).txt-VHDL test vector containing test vector (Test Bench) and Waveform Generator : VHDL examples --- corresponding Adder test vector (test bench). Txt
three-FSM
- 这个程序描述的是模拟并实现三个always的有限状态机的实例-This procedure describes the simulation and three always finite state machine instance
des_3
- 对于3DES加密解密算法的verilog实现，已经得到测试通过，对于学习3DES加密解密的实现过程很有用-3DES encryption and decryption algorithms for the verilog implementation has been tested for learning the implementation of 3DES encryption and decryption process is useful
AMIencode
- AMI编码Verilog源码，经调试为正确，欢迎大家批评指正-This code is written in AMI code with verilog coding procedures, easy to understand, after debugging is correct.
ads7825
- use this source code for interface to adc ads7825
BCD_7
- BCD-7段显示译码器设计 -BCD-7-segment display decoder design
9a801d06cc48
- 关于rel的编码，rel编码器的源程序代码以及分析，-About rel code, rel code source code and analysis
Digital-code-igniter
- 数字密码引爆器，基于verilog的本科毕业设计源代码。-Digital code igniter，Graduate verilog design .
led
- 51单片机对数码管的操作，单片机新手必看的学习资料。-51 single-chip digital control of the operation, the microcontroller Xinshoubikan learning materials.
flowing-water-light-code
- 这是一段基于DE2开发板的流水灯Verilog hdl 代码-This is a based on DE2 development board of flowing water light Verilog HDL code
crc
- 用Verilog编写crc校验码，包括8位，12位，16位，32位，非常实用
LED
- 数字时钟显示模块,用VERILOG HDL 实现