- passthru2003 微软推出的DDK2003里的NDIS例子——passthru
- MT888CODE Code C for transmit and receive DTMF with MT
- velmodel 地震勘探过程中的三到四层水平速度模型的建立
- project-report-on-microcontroller-based-dc-motor- MICOCONTROLLER BASED DC MOTOR SPEED CONTROLLER
- cPP 数据结构c++陈慧南全书源代码 + 课后习题答案
- rodtine-audio-audio STM32F407 routine I2S audio playback I2S audio playback
资源列表
cfq8
- VHDL语言编写8位乘法器非常实用语言绝对正确经过仿真的-VHDL language is very practical 8-bit multiplier is absolutely correct language after simulation
cpu
- 一份精简指令cpu源代码，用verilog编写，已经通过仿真验证，可以模块化移植。-This is a file of cpu code. The cpu is risc cpu. It is simulated and verificated.And the cpu can be transplanted as a module.
wsjscsq
- VHDL程序设计的应用举例：伪随机数产生器-VHDL Programming Application examples: pseudo-random number generator
LEDPWM
- LED台灯程序带有红外遥控功能..资源：p1 口,数码管。p3.4,p3.5 亮度控制按键P3.0 PWM端口,p3.1 蜂鸣器报警-LED lamp with infrared remote control program
proje-vhdl
- ASYMMETRIC LARGE SIZE MULTIPLIERS WITH OPTIMISED FPGA RESOURCE UTILISATION
vhdl
- 数字密码锁的设计 这是本人一周实习 实现的，完全正确，请放心！-vhdl sheji
verilog
- verilog code for the decription of the fsm of the controller
ccp
- Example programming for PIC c-Example programming for PIC cpp
jishuqi
- 各进位计数器，包括16位，10位，4位都齐了-The binary counter, including 16, 10, 4 all here
add16
- 基于FPGA的VERILOG语言的四联十六进制的加法程序-Based on quadruple hexadecimal addition program the FPGA VERILOG language
cic_40Mhz
- 40MHz的CIC滤波器的FPGA设计，内容很完备-CIC filter of FPGA design in 40MHz，content is complete
quartus2-crack
- modelsim注册license解码解码-ModelSim license decoder decoding Register