资源列表
vspi_for
- 用VERILOG编写的SPI通信源码，很好很齐全，可以很容易地修改到自己的产品上-SPI communication with the VERILOG source code written in, nice and complete, you can easily modify to their own products
CIC
- CIC IP core实现结构中自动生成的接口代码,基于软件无线电的应用，在毕业论文中已使用过。-CIC IP core to achieve the structure of the interface code automatically generated, based on software radio applications, has been used in the thesis.
vspi
- SPI的Verilog实现带有SPI算法的注解-The implement of spi using Verilog HDL
pci_steuerung_target
- vhdl code for card pci to fpga
N-DtoA-VHDL-AMS
- 下面是一个混合信号的例子,是一个N位D/A转换器的VHDL-AMS描述-The following is an example of a mixed signal that is a N bit D/A converter described in VHDL-AMS
stopwatch-design-and-verification
- 一个具有秒表功能的模块，具有计时、清零、暂停等功能，精度为0.01s-The module has a stopwatch function, with time, cleared, pause function, accuracy 0.01s
UART
- 经典UART程序，通用异步收发器设计的vhdl语言
chap5
- 《VHDL编程实例》一书的范例文件,第五章内容-" VHDL programming examples," a book of sample files, the contents of Chapter V
UART
- UART FOR VHDL hoping that it can give you a hand.
pilot-incertion-OFDM
- pilot insertion ofdm module
read_solomon
- This project implements a parameterized Reed Solomon decoder for use in OFDM wireless systems.
lab5_VHDL
- VHDL源码 VHDL源码