资源列表
fifo
- fifo用Verilog hdl的实现，这是一个比较常用的源码，文档中有很详细的注释，初学者应该可以看懂。-implementation using Verilog hdl usb, this is a common source, the document had a very detailed notes, beginners should understand.
C8051F040basedGPSnavigatorsimplesourcecode
- 基于C8051F040简易GPS导航仪源代码-C8051F040-based GPS navigator simple source code
USB
- USB源代码，基于VHDL语言编写，在QuartusII上面已验证其功能-USB source code, based on the VHDL language, verified in QuartusII above its function
FIFO2
- 可编程逻辑设计器件（PLD）自推出以来解决了实验室电路板的开发周期问题，该程序实现了FIFO的设计！-Programmable logic design devices (PLD) to solve the laboratory since its launch the development cycle of the circuit board, the program implements the FIFO design!
digital_demo
- 数码管扫描驱动，用Verilog编写，采用模块化思想-digital tube scan driver writen by verilog,using the thought of module
keyboard1
- Source about: interface keyboard with FPGA.
Johnson_count_dft
- DFT code for johnson count written in V
uart.rar
- 带自适应波特率发生器UART实现，经过FPGA验证的！,UART baud rate generator with adaptive realization, after FPGA validation!
wishbone_i2c_master_vhd
- wishbone i2c master vhdl code
BIST_Circuits
- BIST 电路IP核的VHDL语言源代码，需要的开发环境是QUARTUS II 6.0。
caiheng
- 利用Verilog实现32位浮点数的乘法,并且已通过验证.-Using Verilog to achieve 32-bit floating point multiplication, and has been verified.
temp3
- 温度采集系统 基于fpga的vhdl实现的温度计-Temperature acquisition system