资源列表
COP2000
- cpu微命令vhdl源代码-cpu-order VHDL source code
Stopwatch
- Stop-watch for FPGA on 7 segment display
flash_spi_master_axi
- 使用xilinx 的QUAD spi core 对flash芯片进行控制的代码。-Using xilinx s Quad SPI core to control the external flash device.
robust_fir_latest.tar
- 滤波器 Generaic FIR Filter-Generaic FIR Filter
robust_fir_latest.tar
- RobustVerilog generic FIR filter In order to create the Verilog design use the run.sh scr ipt in the run directory (notice that the run scr ipts calls the robust binary (RobustVerilog parser)). The filter can be built according to 3 differe
untitled3
- 篮球24秒计时器，实现24秒计时，每到24秒蜂鸣器报警-Basketball 24 second timer 24 seconds, every 24 seconds a buzzer alarm
mobilerobot
- 用VHDL硬件描述语言，采用一种软件硬化的设计思路设计了控制器。将控制器划分成八个模块
verilog-example
- 4位并行乘法器 4位超前加法器 ALU 计数器 滤波器 全加器 序列检测器 移位器-failed to translate
encoder_count
- 简单的编码器计数程序 算法简单 方便移植 经过测试-A simple encoder count program algorithm is simple and convenient transplantation after testing
LED_vhdl
- LED控制VHDL程序与仿真,FPGA驱动LED静态显示-led vhdl driver
h
- 用VHDL硬件编程语言实现两位十进制数的四则运算，对VHDL语言的学习有进一步的认识。-VHDL hardware programming language used to achieve two decimal numbers 4 operation, the VHDL language, learning and further understanding.
CRC
- 包括按位完成crc运算和按字节并行处理完成crc运算。经测试可以顺利实现编码和解码，功能完美-Bitwise crc computing and parallel processing to complete byte crc computing. Has been tested the smooth realization of the encoding and decoding, perfect function