资源列表
traffic_control1
- 十字路*通灯控制。包括数码管时间显示，LCD显示，蜂鸣器驱动，课程设计，已经通过测试。-Crossroads traffic lights control. Digital tube display, LCD display, buzzer driver, curriculum design, has been tested.
RQDQ-4
- 4人抢答器，计时器和抢答器综合，开始抢答时，计时器从20s开始倒计时，如果无人抢答，计时器到0时报警器响3s，有人抢答，数码管会显示第几人抢答。-4 hours of answering device, timer and answer device synthesis, began to answer, the timer 20s countdown, if no one answer, the timer to 0 when the alarm ring 3s, some people a
VHDL-Files
- 北京化工大学EDA实验源代码。内含有显示8位学号，显示电压值控制，显示时钟，还有一次大实验，用到包的调用。-Beijing University of Chemical Technology EDA experiment source code. Contains 8 student number is displayed, display the voltage value of the control to display the clock, there is one big experi
fpga
- quartus 难得一见的中文教程，fpga必读-quartus rare Chinese tutorial, fpga Required
FPGADE270CACULATOR
- 本文介绍了一个简单的计算器的设计，该设计采用了现场可编程逻辑器件FPGA设计，并基于VHDL语言实现加减乘除功能，并用十进制显示在LCD1602上。-This article describes a simple calculator design that uses a field programmable logic device FPGA design and VHDL language based on arithmetic functions, and decimal display
DDS
- 基于FPGA的DDS信号发生器，可产生频率可调的正弦波(DDS signal generator based on FPGA)
jow_order
- 这是我准备电子设计大赛时，用VHDL写的一个自动打铃系统，很好的学习资料。-This is when I am going to Electronic Design Contest, use VHDL to write an automatic bell playing system, a very good learning materials.
dds_sin
- 此程序是基于fpga的多功能的信号源程序，能调相，调频，调幅等。-This program is based on fpga s versatile signal source can be PM, FM, AM and so on.
it
- 用ISE开发的基于verilog语言的小游戏-ISE development based on the Verilog language games
QuartusIIjianming
- QuartusII中文简明使用手册，对于搞硬件开发的初学者很有用。-QuartusII Chinese condensed manual, engage in hardware development is useful for beginners.
synopsys_dw_pdf
- some pdf about synopsys design ware i2c timer uart
Verilog
- 很不错的Verilog 书籍 ，包括ieee标准和黄金指南-Very good Verilog books, including ieee standards and Gold Guide