资源列表
logic_handbook
- Programmable Logic Design Quick Start Guide from Xilin Co.
canlender_clock
- verilogHDL实现的数字日历 在DE2上实现-the number of calendar verilogHDL to achieve the realization of the DE2
DUO
- VHDL程序，关于电子琴的自动播放，非常有用-VHDL program automatically play on the keyboard is very useful
myfir
- VHDL设计的FIR滤波器，有Matlab设计文件，Quartus II工程以及Modelsim仿真结果和说明文件-VHDL design FIR filters, Matlab design documents, Quartus II project and Modelsim simulation results and documentation
FSK
- 推荐一个FSK解调工程，用Actel FPGA 实现的比较通用，VHDL 源代码。-Recommended Actel FPGA implementation FSK demodulator engineering, more generic, VHDL realization.
vhdl
- 麻省理工学院电子设计实验教程，带详细教学步骤-Massachusetts Institute of Technology experimental electronic design tutorials, with detailed teaching steps
Experiment09
- verilog语言编写的FPGA驱动VGA的程序，经过测试-FPGA using verilog language VGA driver program, using the development platform for quartus 11.0
b1
- FPGA实现LVDS信号输出，可输出所需要的RGB等画面，LVDS是单通道输出-FPGA achieve LVDS output
spram
- 基于altera fpga 的单口ram ip核的应用实例，包含整个工程和moselsim仿真，数据，写使能，地址都是用模块来产生的。-Altera fpga single port ram the ip core application instance, contains the entire engineering and moselsim of simulation data, Write Enable, addresses are generated by the module.
edk
- EDK, 文件说明 EDK使用方法 etc-edk
robot
- fifo接收并口数据并转换为6路脉冲发送-fifo received and converted to parallel data transmission 6-channel pulse
task1-2
- 通过程序点亮LED灯，程序控制简单，还可以一次做成流水灯(LED lights can be lit by programs, and the program control is simple, and the water lamp can be made at a time.)