资源列表
模24计数器
- 模24计数器的Quartus II文本输入设计及其test bench(Quartus II text input design and test bench of modulo 24 counter)
PID
- 利用Verilog语言实现PID增量式控制，输出占空比(Using Verilog language to realize PID incremental control and output duty cycle)
S02《Artix7*秘籍》MIG_DDR内存应用
- artix 7系列 fpga mig ddr3应用教程(Artix 7 Series FPGA MIG DDR3 Application Tutorial)
AD9361
- AD9361资料文档及其寄存器配置参数文档(Ad9361 data and configuration parameter document)
2FSK调制解调的FPGA实现（VHDL）
- 2FSK调制解调的FPGA设计，基于XINLINX的ISE平台开发，采用VHDL语言设计，有设计文档，欢迎学习借鉴(The FPGA design of 2FSK modulation and demodulation, based on the ISE platform of xinlinx, is designed with VHDL language, with design documents, welcome to learn)
Modelsim 10.2c
- Crack of Modelsim 10.2c
CDCM6208_SPI
- 完成对cdcm6208的时钟芯片的配置，输出高频时钟(cdcm6208 cofigure using SPI interface)
elevator
- de2-115开发板2人6层电梯Verilog语言实现(Verilog language implementation of de2-115 development board 2-person 6-layer elevator)
EDA
- 本设计是在Quartus ii开发环境下采用VHDL语言实现的AMI/HDB3编码器课程设计。(This design is a course design of AMI / HDB3 encoder implemented by VHDL language in the development environment of Quartus II.)
polyPhaseFilter
- 数字信道化过程中多相滤波器组matlab代码及测试(Digital channelized polyphase filter code and test)
eetop.cn_专用集成电路设计实用教程
- 本书的主要对象是IC设计工程师，帮助他们解决IC设计和综合过程中遇到的实际问题。(The main object of this book is IC design engineers, to help them solve the practical problems encountered in IC design and integration.)
2017级计算机组成原理课程设计任务1--CPU设计实验
- 学习计算机组成原理的必备利器 用实际操作来亲身感受计算机的内部工作原理(A necessary tool for learning the principle of computer composition Experience the inner workings of a computer with actual operation)