资源列表
alu8
- 计算机中央处理器硬件中的核心部件，算术逻辑运算单元的实现，包括加减乘除，左移，右移，大于等等。-Computer hardware in the CPU core components, arithmetic logical unit implementation, including addition and subtraction multiplication and division, left, move right, than so.
skj
- 有限状态机的经典，根据状态图编码，可以直接实现。-Classical finite state machine, according to state diagram encoding, can achieve.
ywjc
- 采用状态机的方法实现移位寄存器，用Verilog HDL编写，已经通过验证。-The method uses the state machine implementation shift register, with write Verilog HDL has been verified.
exp5
- 采用Verilog HDL完成移位寄存器的硬件实现，非常实用。-Complete the shift register using Verilog HDL hardware implementation, is very practical.
BCD
- BCD码减法实现程序，非常完整，采用Verilog HDL语言实现。-BCD subtraction to achieve program code, very complete, using Verilog HDL language.
cp73001
- 在xilinx开发板下，verilgo编程的，五自由度机械臂的一组动作程序-Xilinx development board in the next, verilgo programming, a group of five degrees of freedom manipulator action program
VEDA7LED
- 采用QUARTUS II 7.2 (32-BIT)工具实现的两位7段数码管动态扫描显示的VHDL程序。硬件电路采用8位拨位开关控制，高四位控制左数码管，第四位控制右数码管。芯片采用EP1C6T144FPGA器件。-By QUARTUS II 7.2 (32-BIT) tools to achieve the two 7-segment digital tube dynamic scan showed the VHDL program. 8-bit hardware with dial-bit s
tcmouse
- 采用TC2.0工具实现WINxp下鼠标的显示，使用了DOS中断机制，可以分别在字符模式下、VGA256模式下实现鼠标的显示。-Tools used to achieve WINxp mouse TC2.0 display, use the DOS interrupt mechanism can be detected in character mode, VGA256 mode to achieve the display of the mouse.
CPLD_V105
- epm240系列cpld的配置文件，实现cpld对flash，uart和sdram的控制等-epm240 series cpld profile, to achieve cpld on the flash, uart and the sdram of the control
risc8
- verilog risc8 cpu-verilog risc8 cpu
fpga_pid
- 基于FPGA的温度模糊自适应PID控制器的设计-FPGA-based PID temperature fuzzy adaptive controller design
shepingreliao
- 基于FPGA的射频热疗系统的设计。很好的一片论文-FPGA-based RF hyperthermia system. A good paper