资源列表
FPGA_PWM
- 基于FPGA的温度检测和PWM风冷系统的设计与实现，很要用的一片论文。-FPGA-based temperature measurement and PWM cooling system design and implementation, is to use a piece of paper.
FPGA_FFT
- 基于IP核的FPGA FFT算法模块的设计与实现 在QUATUSII下实现-IP-based core module FPGA FFT algorithm design and implementation be achieved in QUATUSII
vhdl
- 基于fpga的vhdl语言，芯片是ep2c8系列，此代码实现的是秒表显示，毫秒到分的数码管显示，数码管是共阳的，分模块设计的，-The vhdl fpga-based language, the chip is ep2c8 series, this code is implemented stopwatch showed milliseconds to-point digital control, digital control is a total of Yang, the sub-modul
nios_shi
- 由nios ii实现的，用cfi flash与SDRAM共同实现的电子数字时钟，基于sopc的嵌入式代码，所用软件都是9.0版本的，包括quartus ii9.0 和nios ii9.0-Achieved by the nios ii, together with the cfi flash with SDRAM to achieve the electronic digital clock, based on sopc embedded code, the software is versio
vga_lcd
- vga display using vhdl
5ALTERAFPGA
- 5个ALTERA和FPGA的原理图 5个ALTERA和FPGA的原理图-5个ALTERA和FPGA的原理图
QuartusII
- Quartus+II+中文教程 Quartus+II+中文教程-Quartus+II+中文教程
FPGA
- 应用于FPGA开发中QaurtusII出现 的警告和错误说明-The errors && warning for QaurtusII
CPLD
- FPGA与CPLD之间通过串口通信的程序，波特率为9600。-FPGA and CPLD via the serial port communication program, the baud rate to 9600.
PCM30_Frame_Sync
- 本程序实现了PCM30的帧同步和失步检测，采用verilog编程，包含了工程文件。-This procedure achieved PCM30 frame synchronization and detection step, using verilog programming, includes the project file.
linkrev
- 实现link传输，ts201和fpga的通信功能-Link transmission to achieve
Quartus_II
- Quartus_II使用指南，中文版，图文并茂，非常详细，适合初学者。-Quartus_II Guide, English, illustrated, very detailed, suitable for beginners.