资源列表
jiaotongdeng
- 我们设计一个简单的十字路*通灯。交通灯分东西和南北两个方向，均通过数码管和指示灯指示当前的状态。设两个方向的流量相当，红灯时间45s，绿灯时间40s，黄灯时间5s.-We design a simple traffic light intersection. West and East, and North-South traffic lights both directions, both through the digital control and the indicator indic
soccorrobo
- SOCCER-ROBOT DESIGN ON FPGA source code. The robot is triangle width 20 cm. height 15 cm. have 3 motor and control by L298 chip.
elevator
- 用verylog编的电梯控制程序,适用初学者练习实用verylog语言。-Program for elevator controling by using verylog HDL
dds_last
- 用VHDL编写的DDS，实用简洁，利于学习交流-Prepared using VHDL DDS, practical simplicity, conducive to learning exchange
cpld_sy03091
- cpld epm7128开发板原理图源程序资料-cpld epm7128 information source development board schematics
ic_flow
- IC Flow power point presentation useful for the designing of vlsi chips
Xilinx_FPGA_for_ADC_samp
- Xilinx FPGA开发板的ADC采样源程序-Xilinx FPGA development board of the ADC sample source code
RISC_CPU
- 利用VHDL实现risc cpu，IPcode 的risc cpu-Using VHDL implementation risc cpu, IPcode the risc cpu
SPI
- 利用VHDL实现spi，IPcode 的 spi-Using VHDL implementation spi, IPcode the spi
AVR
- 利用VHDL实现AVR，IPcode 的 AVR-VHDL implementation using AVR, IPcode the AVR
fifo
- 利用VHDL实现fifo，IPcode 的 FIFO-vhdl for fifo
clock
- 我自己用verilog写的一个数字钟程序，仿真通过，能实现简单的功能。-I use verilog to write a digital clock, emulation through, to achieve a simple function.