资源列表
EDAdesigntechnologystopwatch
- EDA技术之_秒表的设计 （1）有使能、暂停、继续秒表计数功能 （2）带有异步复位功能 -EDA technology _ stopwatch design (1) enable, pause, resume, stopwatch counting function (2) with asynchronous reset
shuzishizhong
- 用verilog语言写的数字时钟程序 芯片是EP2C8Q208C8-Verilog language used to write the digital clock program chip EP2C8Q208C8
LCDpinlvji
- 基于EP2C8Q208C8芯片的 LCD显示频率计程序-LCD display based on EP2C8Q208C8 chip frequency counter program
gen_ecc
- ecc generator Error Correction Coding -ecc generator Error Correction Coding
GP_REG_3R1W_64X64
- 64X64 bits SRAM 模型 64 X64 bits SRAM 模型-SRAM Models
krtlcd
- 基于FPGA的液晶显示驱动知识研究，可在quartus II环境下运行-FPGA-based knowledge of liquid crystal display driver can be run in quartus II environment
lcd
- 128*64点阵液晶显示控制器时钟模块，quartus II 运行-128* 64 dot matrix LCD controller clock module, quartus II run
fpga_chufaqi
- 基于fpga的32位除法器的设计，开发环境vhdl-Fpga-based 32-bit divider design, development environment vhdl
Verilog_wjm
- 王金明关于Verilog HDL程序设计教程电子pdf版-On the parity of the number of verilog code has been tested is available.
cbzh
- 串并转换的verilog文件带仿真结果图片的-String and convert the verilog file with simulation results pictures
FPGA
- 第一章、为什么工程师要掌握FPGA开发知识？ 5 第二章、FPGA基本知识与发展趋势 7 2.1 FPGA结构和工作原理 7 2.1.1 梦想成就伟业 7 2.1.2 FPGA结构 8 2.1.3 软核、硬核以及固核的概念 15 2.1.4 从可编程器件发展看FPGA未来趋势 15 第-The first chapter, why engineers should master the knowledge of FPGA development? 5, Chapter
textbook
- 关于VHDL的一系列教程，并且有对于MAXPLUS2软件的教程-A series of tutorials on VHDL and has software tutorials for MAXPLUS2