CDN加速镜像 | 设为首页 | 加入收藏夹
当前位置: 首页 源码下载 嵌入式/单片机编程 VHDL编程

资源列表

« 1 2 ... .80 .81 .82 .83 .84 2985.86 .87 .88 .89 .90 ... 4323 »
  1. memoryarray

    0下载:
  2. 由VHDL撰写的两记忆体转置程序,内含testbench与转置源码。-VHDL written by the two memory migration procedures, includes testbench and migration source.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-06
    • 文件大小:3kb
    • 提供者:Risger
  1. kb_lcd

    0下载:
  2. 由VHDL撰写的PS/2键盘输入至LCD的程序,可以由DE2 Board直接进行烧录测试。-VHDL written by the PS/2 keyboard input to the LCD s program, you can burn directly from the DE2 Board test.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-02
    • 文件大小:876.68kb
    • 提供者:Risger
  1. lgreenm

    0下载:
  2. 由VHDL撰写的红绿灯小绿人,由3*5点阵显示动画,含有许多特殊功能。-VHDL written from the traffic light little green men, from 3* 5 dot matrix display animation, with many special features.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-07
    • 文件大小:1.84mb
    • 提供者:Risger
  1. vga_interface

    0下载:
  2. 以VHDL撰写的萤幕VGA控制程式,有渐层显示功能与框架建立功能。-To write VHDL VGA screen control program, there is a gradient set up in the frame display.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-01
    • 文件大小:1.65kb
    • 提供者:Risger
  1. jiafqi

    0下载:
  2. vhdl减法器 用vhdl语言实现减法功能-Used subtraction vhdl vhdl language subtraction function
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-07
    • 文件大小:8.64kb
    • 提供者:xu
  1. i2c_master

    0下载:
  2. 测试i2c总线的主机代码,可以测试从机的功能,很方便使用-verilog cold i2c master
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-03-29
    • 文件大小:10.22kb
    • 提供者:haichao
  1. 74138

    0下载:
  2. 74138译码器的源程序,用于观察模仿译码器功能的源文件-74ls138
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-08
    • 文件大小:147.7kb
    • 提供者:waiwaiemls
  1. booth_m4_v

    0下载:
  2. The algorithm was invented by Andrew Donald Booth in 1951 while doing research on crystallography at Birkbeck College in Bloomsbury, London. Booth used desk calculators that were faster at shifting than adding and created the algorithm to increase th
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-05
    • 文件大小:23.38kb
    • 提供者:xbox168
  1. crc_xilinx

    0下载:
  2. Cyclic Redundancy Check (CRC) is an error-checking code that is widely used in data communication systems and other serial data transmission systems.-Cyclic Redundancy Check (CRC) is an error-checking code that is widely used in data communication
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-04
    • 文件大小:76.95kb
    • 提供者:xbox168
  1. SwitchLed

    0下载:
  2. FPGA入门程序。适合编程初学者的学习。由开关控制LED灯的亮灭。ISE集成开发环境。Verilog HDL语言编写-FPGA entry procedures. Programming for beginners to learn. LED lights from the light switch control off. ISE Integrated Development Environment. Language Verilog HDL
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-16
    • 文件大小:239.12kb
    • 提供者:李海波
  1. comport

    0下载:
  2. 接口程序的编写,串并转换。本程序在ISE集成开发环境下编写。适合初学者学习。-Interface program of preparation, string and conversion. The procedures in the preparation of ISE Integrated Development Environment. Suitable for beginners to learn
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-09
    • 文件大小:1mb
    • 提供者:李海波
  1. key44

    1下载:
  2. VHDL描述4*4标准矩阵键盘扫描读取并点亮对应的LED灯,试验已经通过。可能还差一些按键的防抖,但不影响整体测试-VHDL descr iption of the standard 4* 4 matrix keyboard scan read and the corresponding LED lights lit the pilot had been adopted. Stabilization may be even worse some of the buttons, it does n
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-01
    • 文件大小:132.78kb
    • 提供者:
« 1 2 ... .80 .81 .82 .83 .84 2985.86 .87 .88 .89 .90 ... 4323 »
搜珍网 www.dssz.com