资源列表
GUNMAOJI
- 全自动伺服驱动压销滚铆plc程序，日本进口的滚铆机原码-PLC
BasicDES
- The BasicDES Cryptography Core is a small, fast implementation of the DES-56 encryption standard.
cfft
- The FFT architecture is pipelined on a rank basis each rank has its own butterfly and ranks are isolated from each other using memory interleavers.-The FFT architecture is pipelined on a rank basis each rank has its own butterfly and ranks
read_solomon
- This project implements a parameterized Reed Solomon decoder for use in OFDM wireless systems.
afficheur
- Driver d afficheur de 4 chiffres de sept segments
aes_core_latest-1.tar
- Simple AES (Rijndael) balance implementation and trade off size and performance-Simple AES (Rijndael) balance implementation and trade off size and performance
quadrature_phase_detect
- verilog程序，正交鉴相算法。可用记事本打开。然后复制到Quartusii里。-The programe written in hardware discr iption languange verilog.
bubble_sort
- sort8k example using RECONOS
mt48lc4m32a2
- SDRAM mt48lc4m32 的modelsim门级仿真模型- modelsim gate-level simulation model for SDRAM mt48lc4m32
IS61LV10248
- IS61LV10248器件的modelsim 仿真模型-IS61LV10248 Verilog model for modelsim
IS64LV6416L
- Asynchronous SRAM IS64LV6416L modelsim仿真模型-Asynchronous SRAM IS64LV6416L Verilog model
counter
- Counter module that implements the counter module in VHDL.