资源列表
bcd_adder
- verilog code for bcd adder
4x2_priorityencoder
- verilog code for priority encoder
4x1_mux
- verilog code for 481 mux
bitadder
- verilog code for 4 bit adder
2x4_decoder
- 2*4 decoder program in verilog
UART
- 是使用ISE实现UART通信功能，可以提高你的FPGA能力。-Is to use the ISE implementation UART communication can improve the ability of your FPGA.
B_PON_ONU_VHDL
- ATM-PON ONU vhdl proj. file good luck
B_PON_OLT_VHDL
- ATM-PON(Passive Optical Network) OLT vdhl proj.file
VHDL_for_clock
- 基于VHDL语言的数字钟设计，附有完整的程序代码，并有仿真结果。-VHDL-based digital clock design, with a complete code, and have the simulation results.
fpga
- fpga数字电子系统设计与开发 ISE I2C UART usb vga -ISE I2C UART usb vga
hh
- ad1674的控制程序VHDL 利于初学者掌握AD新片的控制，实现了初始化，采集存储-AD1674 CONTROL VHDL
Taxi-automatic-billing
- 出租车自动计费系统的verilog程序代码-Taxi automated billing system verilog code