资源列表
doorlock
- doorlock 用verilog语言描写门锁功能-door lock function using verilog language descr iption
8051Core
- 这是个基于FPGA的IP核型MCS51单片机+频率计设计实验。-This is a type of FPGA-based IP core MCS51 MCU+ frequency meter design experiments.
SAP
- Sap-1 implementation in FPGA
13_lcd
- verilog 实现 1602 液晶显示程序。 -a lcd project.It turns out good!
IPcore
- 非常有用的IP核资源，里面包含了JTAG,MEMORY,PCI，SDRAM和USB1.1等内容，期望对大家有用-A very useful IP core resources, which includes the JTAG, MEMORY, PCI, SDRAM, and USB1.1 and other content, expectations for all of us
Ethernet_verilog_ip_core
- Ethernet(以太网)verilog ip core用verilogHDL语言写的以太网软核，对学习verilog语言和以太网有很大帮助。
parall_ad_da
- 实现ad_da，在ISE8.2运行，芯片为xinlix的virtex4-Achieve ad_da, running in ISE8.2 chip for xinlix the virtex4
FPGACPLD
- FPGACPLD.rar 经验谈的无位置传感器的电机控制，步进电机，控制实现，可调占空比-FPGACPLD.rar Experience of the motor control without position sensor, stepper motor, control implementation, adjustable duty cycle
tut_DE1_sdram_verilog
- a complete tutorial on the sdram a verilog code
lcd
- 在Cyclon II EP2C5T144上实现LCD1602的显示 采用VerilogHDL语言编写-To achieve the Cyclon II EP2C5T144 LCD1602 display language using VerilogHDL
pwm__vhdl
- 一个基于vhdl语言的脉冲宽度调制。并且有两个脉冲输出-Vhdl language-based pulse width modulation. And two pulse output
modulator
- 运用FPGA控制AD9957的操作，调试过，运用VERILOG HDL编写