资源列表
sram_simul
- Simple simulation example of SRAM in VHDL and Xilinx ISE
lcd_display
- 两段式lcd_display,摘自 openHW-two part lcd display
vhdltest
- 自己设计的几个VHDL程序，包括译码器电路，多路开关，比较器应用，和16乘8RAM电路，各模块及最终的顶层原理图和引脚我都已给好，希望对大家的学习有所帮助-A few of their own design VHDL procedures, including the decoder circuit, multiple switches, comparator applications, and 16 by 8RAM circuit, each module and final top-leve
jpb_ise12migration
- 旋转编码 功能性键盘编码 spi时序发送数据-cycle key code
Thesis_SHA
- Document based on SHA implementation architecture
3-8yimaqi
- 详细介绍了VHDL中3-8译码器，适合初学者-Details of the 3-8 decoder VHDL, suitable for beginners
timingfiles
- Kodak CCD的AHDL语言描述文件，可以参考查看各类型号的标准仿真波形，有一定的参考价值。-failed to translate
remoteupdatecontroller
- ALTERA CYLONEIII Remote update controller的一个实现例子，包括了通过串口读写EPCS芯片，进行远程烧写-ALTERA CYLONEIII Remote update controller example of an implementation, including read and write EPCS chip through the serial port, for remote programming
carrysaveadder
- carry save adder for addition of 8 bit inputs
CISCmodel-machane
- cisc 模型机设计全部文件cisc Model Design All files-cisc Model Design All files
DDS
- 直接数字频率合成器dds，用verilog实现，经过quartus验证-Direct digital frequency synthesizer the dds, used verilog achieved after quartus verify
mylcd12864_2
- 帮助初学者了解和学习vga，非常适合想学习vga的人-Help beginners to understand and learn vga