资源列表
ADC0809VHDLcontrol
- 基于VHDL语言，实现对ADC0809简单控制。 -Based on the VHDL language, to achieve simple control of the ADC0809.
EDA
- EDA数字电子钟课程设计。时钟自动计时，并且将计时数据传送至显示管显示。-EDA digital electronic clock curriculum design. Clock automatic timing, and timing data will be sent to the display tube display.
7segmentLED
- 7段数码管显示源代码。基于VHDL语言，实现对7段数码管显示。-7 segment LED display source code. Based on the VHDL language, achieving seven segment LED display.
BCD
- 基于VHDL语言，实现二进制转换为BCD码。-Based on the VHDL language, to achieve a binary code is converted to BCD.
4LED
- 基于VHDL语言，实现对4位数码管显示。-Based on the VHDL language, to realize four digital tube display.
ethmac_latest
- 以太网MAC，已经通过测试，详细说明见内README-Ethernet MAC, has been tested in more detail, see README
6fifo
- 入门omnet++,omnet++仿真实验，欢迎大家一起交流。-It is very useful for student who study omnet++.
Firewall
- 硬件防火墙,verilog编写，已通过测试-Hardware firewall, verilog writing, has been tested
clock
- 用Verilog HDL编写的电子钟,实现一些简单功能,包括计时,调时-Written in Verilog HDL using electronic clock to achieve some simple functions, including timing, tone, when
DDS_XHQ
- 通过FPGA实现DDS，产生一个任意波形，本程序实现了一个频率可调的正弦波-Through the FPGA to achieve DDS, generate an arbitrary waveform, this program implements a sine wave frequency adjustable
clock
- 该代码用verilog语言编写，实现24小时时钟计时，时、分、秒，输入为1HZ时钟-The code using verilog language to achieve a 24-hour clock time, hours, minutes, seconds, the clock input 1HZ
VerilogHDlclock
- 基于VerilogHDL设计的多功能数字钟-Based on the design of the multi-function digital clock VerilogHDL...