资源列表
ml50x_schematics
- Xilinx的ML505原理图，器件名称XC5VLX50T-ml505 sch
lab4
- system generator/simulink 应用开发4，User Starting
lab1
- system generator/simulink 应用开发实例，User Starting
vhdl1602
- vhdl和ixiande1602初始化该代码精简！通俗易懂！是初学者的天堂！-vhdl 1602
quartus-work
- 基于FPGA的VERILOG的分频器的设计，10分频设计的源代码和设计思路-Based od FPGA
Reuse-Methodology-Manual-Third-Edition
- 进行SOC/IP 设计以及可重用设计的宝典书籍！是synopsys的一位牛牛写的！ 主要以mentor和synopssy的设计工具为流程，讲述了SOC/IP可重用设计，验证设计的基本方法。 -For SOC/IP design and reusable design book books! A synopsys Niuniu is written! To mentor and synopssy the main design tools for the process, about the
boxingcunchuqi
- 功能强大的波形存储器,对输入的波形进行存储.-Powerful waveform memory, the waveform of the input store.
taxi
- 用vhdl语言编写,能实现功能强大的出租车计价功能.-Vhdl language used, to achieve Taximeter powerful features.
dianfengshan
- 能实现智能风扇控制,包括模式选择.摇头.定时等功能.-To achieve the smart fan control, including the mode selection. Shook his head. Timing functions.
modelsim
- 教程学习MODELSIM,江西介绍了怎么运用改仿真软件进行各种仿真和优化设计-A detailed information of MODELSIM
Prashanth_Chandran_thesis
- thesis based on symbol timing recovery based on fpga
VHDL_DS18B20
- DS18B20的VHDL语言控制方式。D S18B20的VHDL语言控制方式。-DS18B20 control of the VHDL language. DS18B20 control of the VHDL language. DS18B20 control of the VHDL language.