资源列表
demtang09
- the proramme is created to be examble to leran verilog programming. it s porpuse is crease the number is 7-segment from 0 to 9.
Generatedsinewave
- 把程序下载到FPGA中，使其能够产生正弦波，实现其工哪呢个-The process of downloading to the FPGA to enable it to have a sine wave, which can achieve its work months
verilog_pli
- pli函数在verilog中大量应用，但介绍pli的资料并不多，压缩包中的文档是我搜集的pli的资料，希望有对你有帮助。-Pli system fuction is used in verilog language, but material related pli in domestic is rare. the rar package is my collection on pli , hop it is useful.:)
systemverilog
- system verilog 是国际流行的设计和验证语言，根据语言的特点分为两部分:for设计和for验证。另外一种书是介绍如何应用system verilog, 如果你要用syntem verilog, 推荐先读一下。-system verilog is popular hardware design and verification language. The languange compose of two part: systemverilog for desin , system ve
FPGA
- FPGA教程ppt，初学者的入门课程，此外也介绍了常用的器件-FPGA tutorial ppt, the introductory courses for beginners, also introduced a device commonly used
EDA_and_VHDL
- 此压缩包是很好的vhdl教程，详细的介绍了vhdl基础，并且详细讲解了dsp设计-This package is a good tutorial vhdl, vhdl detail of the base, and detailed design on the dsp
Modelsim_fredevider_testbench_TEXTIO
- 此文档通过分频器的例子描述了如何使用modelsim，如何编写testbench以及textio的使用-This document is an example through the divider describes how to use the modelsim, how to write a testbench and use textio
skills_of_ModelSim
- modelsim使用技巧大全，包括使用教程，例子，心得等等。详细描述了如何通过modelsim进行仿真设计，是初学者需要的资料-Encyclopedia of use modelsim skills, including the use of tutorials, examples, experiences and so on. Described in detail how to design modelsim simulation is the need for information fo
quartusii_handbook
- 本文档详细地描述了quartus的使用说明，英文版，对vhdl或者Verilog的初学者有很大帮助-This document describes in detail the use of quartus ， the English version ，vhdl or Verilog， are very helpful for beginners
FIR_filters_Xilinx
- FIR filter design method using Xilinx FPGA platform.
VB_decode
- Viterbi译码的VHDL代码，并且附有详细说明-Viterbi decoding of the VHDL code, and accompanied by a detailed descr iption
BP062-BU-01000-r0p0-00rel0[1][1].tar
- AXI协议检查器，由ARM公司开发对于想开发AXI master和slave模型的ASIC设计人员非常有用！-AXI protocol checker, developed by ARM to develop for the AXI master and slave model is very useful ASIC designers!