资源列表
data_64QAM_map
- OFDM的64QAM星座映射，测试通过，但在时钟方面有待改进-64QAM constellation mapping of OFDM, the test passes and the clock to be improving
Counter8bit
- This is an 8 bit Up Counter coded using Verilog HDL. Bus width can be edited to your desired specs.
Accumulator
- An 8-bit Accumulator with an adder module in Verilog HDL. You can change the bus width decoding the adder.
UpDownCounter
- This is an Up Down Counter coded in Verilog HDL. You can edit the bus width of this.
2013-06-5
- xilinx 嵌入式开发的一个入门的例子，实现m l405开发板led的闪亮。对于初学者有很好的借鉴作用-Examples of embedded development xilinx an entry realize m l405 development board led flashes. For beginners there is a good reference
UpDownCounter_FSM
- This code is an Up Down Counter in FSM using Verilog HDL.
Test
- This an implementation on basic logic gates in Verilog HDL-This is an implementation on basic logic gates in Verilog HDL
Exam-I
- FPGA VHDL comparator
VmodTFT-Simple-Paint-DEMO
- 控制nexys3主板驱动TFT液晶显示器，支持触摸-Control nexys3 motherboard driver TFT LCD display, support for touch
Local_barker
- 巴克码发生器Verilog程序，用于数据传输的帧同步-Verilog program Barker code generator, a frame synchronization for data transmission
SPI
- SPI总线控制程序，用于音频芯片的配置设置-SPI bus control procedures, configuration settings for audio chip
UartSend
- Uart串口发送的Verilog程序，用于测试开发板的串口发送功能-Verilog program Uart serial port for test development board serial transmission function