资源列表
acm_adc
- 利用内部ADC核，通过设置通道数和控制通道交换来采集外部信号，其采样精度和通道数可通过程序控制，已经调试在板上已经运行成功了。-To use the internal ADC nuclear exchange by setting the number of channels and control channel acquisition external signal, the sampling precision and number of channels can be programme
aclock
- 一个verilog的经典实例,即智能化的数字钟-an example of verilog,a clock
crc
- VHDL cyclic redundancy check generator und receiver
rs_encorder
- RS编码的fpga实现，详细的vhdl文档，可以硬件实现。-RS coding fpga implementation, detailed documentation of vhdl can be implemented by hardware.
verilog--dianhuajifei
- 详细介绍了电话计费系统的计时，计费！详细的程序说明-Details of the timing telephone billing system, billing! Detailed descr iption of the procedures
SDRAM_VerilogHDL
- SDRAM的VerilogHDL程序，FPGA控制执行。-SDRAM VerilogHDL program, FPGA control implementation.
test_ddr2_mem_model
- ddr2 test bench top for altera fpga.-ddr2 test bench top for fpga.
1
- 根据交通灯控制器的功能与要求，将其总体电路分为分频器、信号控制器两个模块。-According to the traffic light controller functions and the requirements of the overall circuit is divided into its divider, the signal controller two modules.
uart
- 串口FPGA实现，采用了状态机的方案 串口FPGA实现，采用了状态机的方案-FPGA UART
actel_FPGA_example_source
- actel中的FIFO的使用的示例代码，对于使用actel环境的初学者有一定的帮助。-actel the use of FIFO in the sample code for beginners to use actel environment will certainly help.
TrafficLight
- 用vhdl语言实现交通灯控制的设计 这是学习VHDL语言的经典例子
h264header
- VHDL file for h.264 header