资源列表
CORDIC
- 用verilog写的CORDIC算法实现，很适合做超越函数的运算。通常用于实现正弦乘法，或者坐标变换。-The cordic arithmetic implemented by verilog is adapted to exceed function.It is usually used to implement sine multiplication or coordinate tuansform.
program_all
- 此文件里为我多年收集的子程序模块源代码，对于初学者很适用。用多种语句描叙，有常用的基本电路模块描叙。-this document for many years I collected subroutine module source code, the application for beginners. Using a variety of statements depicts a common basic circuit module depicts.
pppppppppppp
- pong game implementation on spartan 3e fpga kit
Structural-Pipeline-Multiplier
- Structural Pipeline Multiplier
code
- FPGA 学习 .再学习 .谢谢!啥得啊,还不够呢!
T18PM8021
- T18PM8021 176x220 LCD initialization source code
booth
- BOOTH算法VHDL语言代码 基于FPGA quartus-BOOTH VHDL!
mult
- 这是一个mult源文件，用verilog语言写的，经过仿真正确。-This is a mult programm.
bujindianji
- VHDL通过设计有限状态机实现步进电机控制源码程序-VHDL implementation through the design of finite state machine source code stepper motor control program
fifo_verilog
- 用verilog 实现 fifo，宽度按自己需求扩展-Achieved with the verilog fifo, the width of expansion according to their needs
src
- n位二进制绝对值减法器，基于FPGA的硬件语言-n-bit binary absolute value subtraction, FPGA-based hardware language
FPGA-KZCJ
- NIOS2 FPGA控制TLC5540进行数据采集-FPGA TLC5540 control NIOS2 for data collection