资源列表
kcpsm3
- this source code of kcpsm3
shift_register
- shift register it is shifte register for vhdl coding
floating_point_adder
- 该代码描述了一个浮点加法器的功能，浮点格式采用IEEE标准-The code describes a floating-point adder function, the use of IEEE standard floating-point format
vhdl
- VHDL语言例程集锦,语言:英文 内容<<Examples of VHDL Descr iptions>> <<-VHDL Language Guide,language: English
3970988VHDL44
- VHDL实例44个，对于新手来说 勉强可以用-VHDL example 44 for the new force can be used for
555
- 四位元乘法器(含TPD) 被乘數:SW(3..0) 乘數: SW(7..4) 積: LEDR(7..0)-Multiplier 4 yuan (including TPD) multiplicand: SW (3 .. 0) multiplier: SW (7 .. 4) plot: LEDR (7 .. 0)
eth_phy10
- an ethernet physique sender. it s implemented with spartan 3E starter kit
lift.vhd
- 用VHDL实现了电梯的模拟程序，实现了自动判断楼层，然后根据客户需求和楼层最近原则，实现自动判断上下行，还有报警，强制开门等功能-Achieved using VHDL elevator simulation program, to determine the realization of an automatic floor, and then based on the principle of demand and the floor recently, automatically dete
ADDER
- simple 16-bit CSA Adder
ADDER(2)
- simple 16-bet CLA adder
counter.tar
- 基於verilog 所製成的counter程序，可以向上計數-Verilog made based on the procedures of the counter can count up
top.tar
- 用verilog寫出來的貪食蛇程序,使用開原軟體iverilog進行摹擬-a simple program written in verilog