资源列表
lab04
- RTL in Verilog (Vending Machine)
AppendixC_quartus
- Quartus appendix - Can be useful if you start using quartus II to code in verilog-Quartus appendix- Can be useful if you start using quartus II to code in verilog
xapp930
- RGB to Y CB CR conversion source code in VHDL
cf_fft_256_8
- This is a source code of 256 point fft architecture. This code is also available with opencores-This is a source code of 256 point fft architecture. This code is also available with opencores
zhuangtaiji
- 十种状态机例子（VHDL）包括米勒型和莫尔型的状态机。-Dozens of examples of state machine (VHDL), including Miller and Moore type state machine.
BJ-EPM240_study_guide_plate
- BJ-EPM240V2实验例程以及说明文档实验之BJ-EPM240学习板使用指南-BJ-EPM240V2 experimental test routines as well as documentation of the BJ-EPM240 study guide plate
Quartus_II_called_ModelSim_simulation
- BJ-EPM240V2实验例程以及说明文档实验之十五Quartus II调用ModelSim仿真实例-BJ-EPM240V2 experimental test routines as well as documentation of the Quartus II 15 ModelSim simulation calls
MAX_II_examples_of_internal_shocks_clock
- BJ-EPM240V2实验例程以及说明文档实验之十三MAX II内部震荡时钟实例-BJ-EPM240V2 experimental test routines as well as documentation of the MAX II 13 examples of internal shocks clock
IIC_communication_experiment
- BJ-EPM240V2实验例程以及说明文档实验之十IIC通信实验-BJ-EPM240V2 experimental test routines as well as documentation of the communication experiment IIC
PS2_keyboard_decoder_experiment
- BJ-EPM240V2实验例程以及说明文档实验之九PS2键盘解码实验-BJ-EPM240V2 experimental test routines as well as documentation of nine experiments PS2 keyboard decoder
Serial_Communication
- BJ-EPM240V2实验例程以及说明文档实验之八串口通信-BJ-EPM240V2 experimental test routines as well as documentation of the eight serial communication