资源列表
ieee
- VHDL IEEE STANDARD IN HTML FORMAT
xilinx_count
- 关于xilinx环境下的电路设计，验证计数器电路的正确性-About Xilinx design environment, verify the correctness of counter circuit
microblaze_pwm
- spartan3e microblaze 定时器使用的一个源代码-spartan3e microblaze timer using a source code
VHDL
- Very low cost, low component count charger/adapter – replaces linear transformer based solutions • Extremely simple circuit configuration designed for high volume, low cost manufacturing-Very low cost, low component count charger/adapter – rep
NewFolder
- Verilog code for RTC
Xinlinx_footprint
- FPGA的部分封装图，可以为大家省下不少功夫。-FPGA part of package plans, we can save everyone a lot of kung fu.
mccd_capture
- 采用verilog语言，实现视频的采集。通过fpga控制，实现视频逐行采集。-The use of Verilog language, the implementation of video acquisition. Through the FPGA control, achieve progressive video collection.
Verilog_example_of_pulse_width_modulation
- 学习verilog的一些资料。是脉宽调制控制的题目，以及源码和仿真文件。感觉代码风格还不错，可以学习一下。-Verilog study some of the information. Pulse width modulation control are the subject, as well as the source code and simulation files. Feel good style of code, you can study about.
risc
- RISC（reduced instruction setcomputer，精简指令集计算机）是一种执行较少类型计算机指令的微处理器。改源码是vhdl语言，能在FPGA上跑。-RISC [reduced instruction setcomputer, Reduced Instruction Set Computer] is an implementation of fewer types of computer instructions to the microprocessor. VHDL s
CIEDE200020090228160339
- 一个日本人的计算两个LAB色彩空间点的色差的函数-A Function implemented the Color difference with Two Color in CIE L*A*B ColorSpace from a japanese
QPSK_VHDL
- VHDL语言的QPSK调制示范源码。很有参考价值-VHDL language QPSK modulation source model. Useful reference
vhdlbasics
- its a tutorial to understand basics of vhdl