资源列表
diantikongzhiqi
- 基于Verilog的八层电梯设计，能够实现自动化的电梯控制。-Verilog based on the eight-lift designed to automate the elevator control.
100vhdl
- VHDL常用实例，适合初学者，有计时器等常用例子-Common examples of VHDL, suitable for beginners, there are examples of commonly used timer, etc.
counter10
- 带LDN的的同步的预置数端子，并且带CLR的异步清零端-LDN synchronization with the preset number of terminals, and cleared with CLR Asynchronous client
pwm
- 实现PWM波型....使用VHDL语言-Realization of PWM waveform using the VHDL language ....
usb_funct
- VHDL USB2.0接口源码,内有说明,详细.-VHDL USB2.0 interface source code, which is described in detail.
mc8051
- mc8051内核,VHDL程序,内有说明,超详细.-mc8051 kernel, VHDL program, which has made it clear, super-detailed.
8051
- 8051单片机VHDL内核,内有说明,很详细,值得下载-8051 VHDL core, which has made it clear that, in great detail, it is worth downloading
testproject2
- 利用VHDL编写的counter程序，基于FLIP-FLOP-Counter the use of VHDL procedures prepared, based on the FLIP-FLOP
send_test
- 输入时钟，可以得到周期性的有效信号以及同步信号，同时可以随时钟输出8个字节的数据-Input clock, can be an effective signal, as well as periodic synchronization signal, at the same time can be 8-byte clock output data
cpldbus51
- CPLD与8051的总线接口VHDL源码-CPLD with 8051 bus interface VHDL source
FPGA
- 大型设计中FPGA的多时钟设计策略,希望有需要的人喜欢-FPGA design of large-scale multi-clock design strategy, I hope there is a need of people like