资源列表
clk
- just division the clock into 2
biaojueqi
- 这是一个用VHDL语言实现的非常实用的表决器-This is a VHDL language with the very practical voting machine
S13_VIDEO_IN_AV
- AV视频信号输入后，存入SDRAM中然后在PC上面进行显示的代码。-AV video signal input into the SDRAM in the PC and then display the code above.
S12_AudioLoopback_DAV_MIC
- 从MIC输入一段音频然后，再从AOUT的接口播放出来的verilog 的代码-Input from the MIC for some audio and then AOUT interface from broadcast in the Verilog code
S10_PS2_RS232
- 键盘输入串口输出显示字符,通过串口显示键盘输入的字符-Keyboard input serial output display characters, the keyboard input through serial display characters
S9_PS2_LCD
- 键盘输入液晶模块显示字符,在液晶显示屏上显示从PS2键盘输入的字符-Keyboard input LCD display module characters displayed in the LCD screen from the PS2 keyboard input characters
led
- 适用于FPGA初学者,一个流水灯的程序,用VERILOG语言写的.-Applicable to FPGA beginners, a procedure for light water, using the Verilog language.
VHDL
- 自己收集的VHDL例程代码，适合初学者学习用，希望能给大家带来帮助。-Collected their own routines VHDL code, suitable for beginners to learn, I hope we can help.
xuliejiancesheji
- 用状态机实现一序列检测器，即检测到串行码{1110010}后，检测器输出1，否则输出0； -State machine used to achieve one sequence detector, which detects the serial code (1110010), the detector output 1, otherwise output 0
traffic
- 利用vhdl编写的模拟交通灯的程序，调试成功，欢迎大家使用。-Prepared by the use of VHDL simulation of traffic lights procedures, debugging success, welcome to use.
shopping
- 利用vhdl编写的商店的模型程序，调试通过，可以正常模拟，欢迎大家使用-Prepared by the use of VHDL procedures store model, debugging is passed, can the normal simulation, welcome to use
snake
- 利用VHDL语言编写的一个蛇形的程序，调试成功能够实现。可以在quarters ii 上运行，欢迎大家使用-VHDL language using a snake-like procedures, debugging success can be realized. Quarters ii can run on, welcome to use