资源列表
Key-200893142940130
- 关于地铁售票的一些功能 基于自动买票的VHDL设计程序 比较经典-Subway ticket on some of the features of the VHDL-based auto-buying classic design procedure
ch1
- cpld/fpga概述以及硬件描述语言设计的一些概念-cpld/fpga outlined as well as the hardware descr iption language design some of the concepts
adder
- cpld/fpga常用加法器设计的verilog程序-cpld/fpga common adder Verilog design procedures
bitNode_Behaviora_VHDL
- LDPC码的消息节点（Bitnode）消息更新过程的VHDL语言实现-LDPC code of the message node (Bitnode) news update process of the VHDL language
checkNodee_Behavioral_VHDL
- LDPC码校验节点（checknode）进行奇偶校验方程时的vhdl编程，硬件语言实现-LDPC check nodes (checknode) carried out at the time of parity equation VHDL programming, hardware language
top_2
- 基于CPLD的签到器的设计，用三维数组队人名进行储存-Based on the attendance CPLD design, a few team names with three-dimensional storage
VCchuankou
- verilog ADPLL file with testbench
SPI_FireWall
- verilog spi file with testbench
MinWinsockSpi
- verilog ADPLL file with testbench
even_division
- 任意基数分频VERILOG代码，经过了编译，可以修改数字改变分频。-Arbitrary base frequency Verilog code, after compilation, the figures can be amended to change the frequency.
8051core-Verilog
- 8051的verilog内核，fpga里实现8051的话用得上-8051 Verilog cores, fpga achieve useful 8051 words
vga
- 基于EPM1270的VGA显示器接口源码Verilog-Based on the EPM1270