资源列表
KEY2LED
- Spartan xc3s400 KeyToLED VHDL program
PWM
- 用FPGA实现pwm调制波，通过单片机软核控制输入量来实现任意占空比方波的产生-wave
vhdl-examples
- VHDL写的100多个经典例子，适合初学者。包括分频器，简易时钟等-VHDL written more than 100 classic example, suitable for beginners. Divider, the simple clock
EDA
- 移位相加8位硬件乘法器电路设计,该乘法器是由8位加法器构成的以时序方式设计的8位乘法器。-Add 8-bit hardware multiplier shift circuit design, the multiplier is composed of 8-bit adder to temporal order, 8-bit multiplier design.
jiafa
- vhdl的加法计算，用于初学者熟悉vhdl语言-for the newers to get familier with vhdl
jianpan
- 用FPGA单片机软核实现键盘扫描，键盘为4X4矩阵键盘，输入相应键值，用数码管显示-keyboard
bouncing_ball
- 使用verilog硬件描述语言实现经典游戏反弹球（打砖块）。-Verilog hardware descr iption language using the classic bouncing ball game (Arkanoid).
W5100
- 使用spi模式初始化w5100，实现了快速以太网的初步建立-Using the spi mode initialization w5100, to achieve the initial establishment of a Fast Ethernet
e2fmt.tar
- edif to blif FPGA research application used to convert edif file formats to blif
高级FPGA设计 结构、实现和优化
- 高级FPGA设计 结构、实现和优化,电子书，对FPGA学习有帮助-Advanced FPGA design structure, implementation, and optimization, e-books, learning on FPGA help
01.ISE8.2
- 这个是我用的合众达试验箱里面的资料。合众达试验箱里面集成的是xilinx的virtex4，这个是在ise环境中审计的程序，包括led,da/ad转换实验，键盘实验，以及rtc读取和lcd显示等。-vhdl programs that used by xilinx virtex4
uart2bus
- uart接口到内部总线的IP核，采用VDHL和VERILOG语言编写。-UART interface to Bus IP Core in VHDL and verilog languages