资源列表
Counter
- 采用HDL语言，实现计数器的功能，这个在程序设计中很常见。-The counter is design by HDL.
Bell
- 这个是一个驱动蜂鸣器的实验，采用HDL语言编程实现。-The bell code is design by HDL.
CANBus_design
- CAN总线代码，除了opencore上的ip核之外，主要是原创的配置CAN核和数据采集传输部分-CAN bus code, in addition to the ip nuclear opencore on the original configuration of CAN main nuclear data acquisition and transmission section
matlab_for_FPGA_mif_coe
- 利用matlab生成sin、cos、sinc和insert等mif文件-Using matlab to generate a variety of mif file
fir
- 利用系数奇对称的性，节约一半乘法器资源，实现平行FIR滤波器的功能。-The function of parallel FIR filter is realized by using oddly symmetric coefficients and saving half of the multiplier resources.
Templates for Avalon Memory Mapped Devices
- Templates for build Avalon Memory Mapped Devices using QSys and Quartus
Massive Shifter
- Massive Shifter in VHDL, required in Matrix-Vector operations
Comparateur-4-bits
- 4-bit comparator code VHDL
Multiplexeur-4
- 4-bit multiplexer code VHDL
1bitadder
- 1 bit adder code VHDL
class11_uart_tx
- verilog编写的串口发送程序，学习串口的话可以用作参考，已经实际验证过-Verilog prepared by the serial port to send procedures, learning serial port can be used as a reference, has actually verified
class12_uart_rx
- verilog编写的串口接收程序，学习串口的话可以用作参考，已经实际验证过-Verilog prepared by the serial receiving procedures, learning serial port can be used as a reference, has been verified