资源列表
USB2_0
- USB2_0控制器CY7C68013与FPGA接口的VerilogHDL实现.rar-CY7C68013 and FPGA controller USB2_0 interface VerilogHDL achieve. Rar
NIOS
- 这是黑金动力社区FPGA开发板的源程序代码，前几天买个板子 光盘里带的-black gold FPGA source code
ps2
- 基于VHDL的，有ps2接口控制的，vga显示的加减计数器-Based on VHDL, there are ps2 interface control, vga show addition and subtraction counter
ps2_mouse_interface
- ps2接口的鼠标与vga接口的驱动程序，Verilog HDL语言，运用于FPGA-ps2_mouse_interface and vga in Verilog HDL language, applied to FPGA
AD7864
- AD7864控制逻辑。Verilog语言编写。-AD7864 control logic. Verilog language.
ad7864
- ad7864的控制程序，靠计数器排的时序-ad7864 control program
DW_ahb_dmac_sbiu
- designware提供的dmac slave接口硬件描述语言-designware provide the source code verification VIP FIFO
Verilog_for_BCH
- 使用verilog语言实现BCH编码，用于通信信道编码-Using verilog language implementation BCH coding, channel coding for communication
spi93c46
- CPLD控制93C46的HDL示例代码，只是简易测试而已哦-CPLD control the 93C46 of the HDL sample code, just simple test just oh
crack_modelsim_6.6d
- crack_modelsim_6.6d，最新版modelsim仿真软件-crack_modelsim_6.6d, the latest version of modelsim simulation software
clock
- 万年历与电子时钟的VHDL程序设计，万年历与电子时钟的VHDL程序设计-clock
vga256
- 基于FPGA的VGA显示,256色显示,学会使用FPGA的ROM设计方法-FPGA-based VGA display, 256 color display, learn to use FPGA-ROM Design