资源列表
Hex_decoder_7seg
- 十六进制显示译码器，VHDL语言的设计，根据高低电平的变化进行数码管的数字显示-Hexadecimal display decoder VHDL language design, high and low changes in the number of digital tube display
Shfit8bit
- 8位移位寄存器的vhdl设计，经过仿真验证，程序简单易懂，易于初学者借鉴-8-bit shift register vhdl design, through simulation, the program is easy to understand, easy for beginners learn from
fenpin
- 分频器的设计，改变DWIDTH的大小可以改变具体分频的多少，举一反三-Divider, size change DWIDTH can change the divider, giving top priority
CPLDfrequency
- 频率计CPLD模块。主要实现多次十分频，对各位频率进行计数。锁存和清零功能-Frequency counter:function as a frequency division. counter each bit. latch and clear
SimpleProcessor
- 一个简单处理器的设计 包含了一定熟练的寄存器、一个选择器、一个加法/减法器单元、一个计数器和一个控制单元-The design of a simple processor contains a certain skilled register and a selector, an addition/subtraction unit, a counter and a control unit.
LightControl
- 简单状态机的设计——雷鸟车尾灯控制器设计-Simple state machine design- Thunderbird taillights controller design
simpleRAM
- 使用几种不同的方法设计FPFA片上存储器-Using several different methods of design FPFA-chip memory
NIOSUCOSII
- 基于NIOS的μC/OS-II实验初步 建立NIOS工程-The initial establishment of the μC/OS-II experiment based on NIOS NIOS engineering
lab13
- Quartus实现单周期处理器，利用verilog语言-verilog cpu design
VHDL
- VHDL语言的参考书籍，英文版，十分具有参考价值！-VHDL language reference books, in English, very has reference value!
RN8209
- RN8209 程序的使用，通过SPI与CPu进去通讯，读取电源参数
PI_Final
- Its working and tested in Xilinx Sortware.