资源列表
cnt10
- 这是一个使用vhdl语言编写的fpga代码，它能够实现0-9之内的计数功能。-This is a use of the VHDL language fpga code, it can achieve the 0-9 count.
sopcAD7352nios
- 基于sopc的7352的ad模块的nios软核多通道编写.rar-The sopc 7352 AD module nios soft core multichannel write. Rar
QEI_D
- 实现单片机QEI功能，对输入信号4倍频，并且判断方向-Achieve the microcontroller the QEI function, the input signal 4-fold, and determine the direction of
dda
- 该程序描述了运用FPGA 实现DDA圆弧插补运算-FPGA DDA
mydiv
- 实现除法运算的Verilog实现（累加比较法）-The division operation Verilog achieve (cumulative Comparative Law)
flashvhd
- 用FPGA编写的三星k9系列flash读写擦出程序-Samsung the k9 Series flash reading and writing struck a program written using FPGA
FPGA-DDS-algorithm
- 采用FPGA的DDS算法Verilog程序的实现-FPGA DDS algorithm Verilog program implementation
saomiao
- QuartusII平台下verilog语言实现的数码管动态扫描-The verilog language digital QuartusII platform tube dynamic scan
CLK
- QuartusII平台verilog语言实现的CLK下降沿测试-CLK falling edge QuartusII platform
8LED
- QuartusII平台下Verilog语言实现的8段LED显示程序-Verilog language QuartusII platform 8-segment LED display program
Push-Button
- 旋转按键源码，完美体现控制led的左移右移-Rotating key source, the perfect embodiment of control led the shift left shift right
rom_coe
- 这是一个用verilog编写的用rom核控制led显示的左移右移，并有按键控制-This is written in verilog rom nuclear control led left shift right shift, and key control