资源列表
61EDA_C915
- altera公司的SDRAM 控制器的ip core源代码 里面包含verilog及vhdl两种语言编写的 方便选择-altera company SDRAM controller ip core source code which contains verilog and vhdl two kinds of language for easy selection
juchibo
- verilog实现输出锯齿波形，已经通过DA芯片验证通过-verilog to achieve the output sawtooth waveform, has passed through the DA chip verification
juzhenjianpan
- 矩阵键盘应用于FPGA的verilog代码，使用的是DE0，引脚已分配-Matrix keyboard used in the FPGA verilog code, using DE0, pin has been assigned
shumaguan
- FPGA中数码管的使用，verilog程序，已经显示成功-The use of the FPGA digital tube, verilog program, has been shown to successfully
time
- 基于Verilog HDL ＦＰＧＡ开发，时序篇详细教程代码，丰富实例源代码，FPGA学习与参考非常好用-Based on Verilog HDL FPGA development, timing articles detailed tutorial code, abundant source code examples, FPGA is very useful learning and reference
chengfachufa
- ISE13.2的SPARTAN-3E 乘法除法器-ISE13.2 the SPARTAN-3E multiplication Divider
p_s_fpga_to_mcu
- fpga与单片机通信，fpga端，fpga发送，单片机接受，能发多位数据，可以自己设置-Communication with the microcontroller fpga, fpga end, fpga sent microcontroller to accept, to send a number of data, you can set up their own
ads7841_control
- 本程序是fpga控制ads7841采样，fpga中用状态机来写时序，亲测可用-This procedure is fpga control ads7841 sampling, fpga using state machine to write timing, pro-test available
dac7554_wr
- 本程序为fpga控制dac7554输出，用状态机来写时序，亲测可用-The procedures for the fpga control dac7554 output, the state machine to write timing, pro-test available
Modelsim_How_to_use_pdf
- Modelsim的使用方法，适合新手学习，有详细的操作方法和例程-Modelsim to use, suitable for beginners to learn, detailed operating methods and routines
Modelsim
- Modelsim的使用方法，适合新手学习，有详细的操作方法和例程-Modelsim to use, suitable for beginners to learn, detailed operating methods and routines
Quartus-guide
- Quartus II的详细使用教程，初学verilog的可以好好看看，相信会有所帮助的-Quartus II detailed tutorial, verilog beginner can take a look, I believe will be helpful