资源列表
running-water-led
- 流水灯程序，采用组合逻辑。内有仿真文件。是FPGA开发必须学的一个程序-Light water program, using a combination of logic. There simulation files. Is a program FPGA development must learn
FPGA
- FPGA很不错的入门教学，并有大量实例以帮助学习。-FPGA very good introductory teaching, and there are a lot of examples to help learning.
seg3uart
- FPGA驱动串口，实现FPGA实验板串口与pc机的通信，支持各种波特率的串口自发自收功能-FPGA-driven serial port, serial port to communicate with the FPGA experimental board pc machine supports a variety of serial port baud rate of spontaneous self-closing feature
mips32
- PROJECT for misp32 microprocessor pipline
AES
- AES算法加解密过程的Verilog代码，包括测试文件，通过FPGA验证。-AES algorithm encryption and decryption process Verilog code, including test files through the FPGA verification.
SDivider16bit_V120
- 循环型除法器Verilog代码，带有8位小数，可使除法器固定长度，缩减时钟开销-Streamlined divider Verilog code, with eight decimal places, make fixed-length divider, reducing the overhead clock
I2S
- 本代码提供一种音频I2S读取数据的verilog代码，并且向fifo写入-This code provides an I2S audio data is read verilog code, and write to the fifo
DE1-verilog
- Altera公司推出最新开发板DE1。该资料为DE1的FPGA 代码，包括ADC，音频处理，视频输出等，供大家参考使用。-Altera Corporation introduced the latest development board DE1. The data for the DE1 FPGA code, including the ADC, audio processing, video output, etc., for your use and reference.
lm75
- 温度传感器的VHDL实现，可以实现对温度的测量，基于赛克隆4芯片实现-温度传感器的VHDL实现，可以实现对温度的测量，基于赛克隆4芯片实现 The temperature sensor VHDL, can realize the measurement of the temperature, season 4 chip based on cloning
buffer
- 基于verilog hdl语言的fpga缓存器buffer的一种编写 输出4组16位数-verilog hdl text for fpga of a buffer
fx2lp_slaveFIFO
- 一种基于quartus下的labview开发驱动 将代码用到原理图中 可以进行下位机与上位机之间的读取与上传-fifo driver
std_div
- 分频模块 用veriog hdl实现十六分频-clock division module