资源列表
Basic_inverter
- Inverter full custom design using IC station
MUSIC
- verilog实现xilinx的音乐播放（使用蜂鸣器）-xilinx verilog realize music player (with buzzer)
micron-lpddr-sdram-lpddr_model
- modelsim，micron公司的ddr sdram仿真模型，verilog。-modelsim，micron，ddr sdram simulat module，verilog。
Hardware-Layout-Design-for-DDR2
- ddr2的硬件布线设计学习资料-hardware design for ddr2，verilog
DDR2-design-out-of-fpga
- FPGA外部的ddr2设计的相关学习资料-off-fpga，ddr design
DDR3design-on-xilinx
- 在xilinx平台上实现的ddr3的设计，verilog-ddr3,design on xilinx,verilog
verilog-ddr-sdram
- 用verilog实现的ddr sdram控制器-ddr sdram by verilog hdl
Alliance-VLSI-CAD-System-master
- Alliance VLSI CAD Design System and Soutce code....include a all RTL2GDSII Flowchart
1024-point-FFT-in-verilog.pdf
- 1024 点得快速傅里叶变换算法 FPGA in verilog-1024 point FFT on a FPGA written in verilog
jtag_master.tar
- JTAG模块的VHDL代码，用于了解JTAG内部结构原理，可集成嵌入IC,为IC提供JTAG功能。十分强大的代码，方便可靠。-VHDL code JTAG module is used to understand the internal structure principle JTAG can be integrated embedded IC, the IC provides JTAG functionality. The code is very powerful, convenient
led_new
- 时钟分频 FPGA 键盘实验操作程序 谢谢大家 我真的是来下载程序的 -clock FPGA clock div
pulse_sequence
- 用VHDL语言实现了并行脉冲控制器的代码-Using VHDL code parallel pulse controller