资源列表
MAC_controllor
- mac控制器的代码，包含仿真程序,用verilog HDL语言实现。-the verilog code of mac controllor and with the testbench
emi(1)
- the external memory interface for the ddr ddr2 ddr3 sdram device
20090218_Holtek_ht1380
- The HT1380 is a serial timekeeper IC which provides seconds, minutes, hours, day, date, month and year information. The number of days in each month and leap years are automatically adjusted. Also, the HT1380 is designed for low power consu
ex10_cof_M4K_test2
- 基于FPGA开发环境下配置M4K产生一个4*4*8bit的移位寄存-Produce a 4* 4* 8bit shift register-based FPGA development environment to configure the M4K
ps2verilog
- 基于FPGA开发环境下的PS2实现入门源代码-Getting Started with source code based FPGA development environment under the PS2
verilogsram
- 基于FPGA开发环境下设计的静态随机存储器-Static random access memory based FPGA development environment designed
de_dect
- LIFT CONTR0LLER...DESIGNED WITH FINITE STATE MACHINE WITH MOORE MACHINE
UART_verilog
- 电脑发数据，CPLD接收后会送电脑的，verilog程序，可以直接使用-Computer to send data, the CPLD will be sent after receiving the computer, Verilog program can be used directly
shuzixitongn
- VHDL代码 计数器 完成一分钟内的计数，到59清零，提供4个频率选择-VHDL code counter finished within one minute count to 59 cleared, 4 frequency selection
Fmc880511P
- 可在FPGA上运行的8051 IP coore，是学习FPGA及SPOC的好资料。 -8051 IP coore, can be run on the FPGA is good information to learn FPGA and SPOC.
I50550PWM_V55m
- FPGA 实现一种基于ISA接口的3路编码器计数，与3路PWM/DDA输出编码器计数包含倍频、鉴相PWM实现12位分辨率 已通过测试。 -FPGA implementation based on the ISA interface, 3 channel encoder count, and 3-way PWM/the DDA output encoder count contains a multiplier, the phase PWM 12-bit resolution has been
rligght_telege
- 实光电码盘的输出数据的四倍倍频，使码盘输出精度提高四倍。-Four times the multiplier of the output data of the real optical encoder, the encoder output precision increased by four times.