资源列表
Carpma
- integer multiplication
shift
- “双向”指的是加1还是减1操作，可以用语句 if dir=’1’ then … else实现； “异步清零”指的是只要reset为高电平，立即清零，而不需要等待时钟脉冲（计数脉冲）到来； “同步时钟使能”是指当enable有效时还不能立即把内部输出值加载到锁存器的数据端，而是需要等到下一个时钟，在时钟信号的控制下再相应。 -" Two-way" means plus or minus 1 operation, with a statement if dir = &#
shift
- VHDL写的移位寄存器，可以应付老师的检查，能下载到板子上跑-Shift register can be written in VHDL the teacher checks payable can be downloaded to the board ran
sd_vga_photo
- 深入浅出玩转FPGA DIY数码相框工程源码-Layman Fun the FPGA DIY digital photo frame engineering source
fpga--OV7670-code
- fpga 对OV7670的硬件初始化 希望对你有点帮助-ov7670 initialized code in fpga
FinalCPU
- 用VHDL语言编写的简单CPU程序,实现了加减乘除和移位功能。-a simple CPU program writen by VHDL language , it realizes the add, subtract, multiply ，divide and shift function.
SingleCycleCPU.zip
- A complete single cycle cpu written in verilog. (Including test modules),A complete single cycle cpu written in verilog. (Including test modules)
PWM_OUT
- 这是一个EP2C5T144的FPGA产生PWM信号到LED上控制LED的亮度的源程序，可以通过按键来改变占空比，带有电路图:)-This is a PWM signal to control the brightness of the LED to the LED source a EP2C5T144 the FPGA button to change the duty cycle, with the circuit diagram :)
ISE_lab14
- 以前的xilinx公司的软件的FPGA的实验程序4-Xilinx company s previous software FPGA experimental program
RS-232
- RS-232发送接受模块，测试好用，满足一般要求-RS-232 transmit and receive modules, easy to use test, meet the general requirements
STA_plan_routing
- 关于数字逻辑设计中静态时序分析和布局布线相关的资料。-Static timing analysis in digital logic design and layout information.
SDRAM-design-FPGA-altera
- SDRAM design FPGA altera-SDRAM design FPGA altera.