资源列表
BCD-youxianbianma
- 优先编码器，通过VHDL语言实现BCD优先编码的功能-Priority encoder BCD priority encoder function through VHDL language
shuzizhong
- 在单片机上实现数字钟，时分秒的显示以及整点报时功能。-Realize single-chip digital clock, hour, minute and second of the display, as well as the whole point timekeeping function.
adio_encoser_and_decoder.zip
- digital audio conversion logic,digital audio conversion logic
ISP1362
- 友晶公司的开发源代码，使用起来比较方便，学习FPGA的都会用到-Terasic development source code, it was easier to use, will be used for learning FPGA
bch_dec_enc_dcd_latest.tar
- BCH译码器设计源代码，它能实现对两位错误的纠正。这是最新版本。-The BCH decoder design source code, it can achieve the two error correction. This is the latest version.
wireless
- 基于FPGA DE0以及niosII的射频无线发送程序,采用spi接口操作无线模块nrf24l01-To spi interface operation wireless module nrf24l01 of FPGA DE0, as well niosII RF wireless transmitter program
1.2-led_change
- verilog代码控制led改变 使用xlinx开发平台-led_change verilog
myproject
- 开发环境ISE，使用VHDL语言实现了任意整数分配的分频器，又有一个信号可以控制左转右转的流水等。-Development environment ISE using VHDL language to achieve arbitrary integer assigned crossover, there is another signal control Zuozhuanyouzhuan running water, etc..
SDRAM
- SDRAM的verilog程序，很好地程序，希望大家支持-SDRAM verilog program, a good program, I hope you will support
miaobiao
- 秒表的VHDL语言程序，是实验课上一个课程设计，非常正确，非常好用。-Stopwatch VHDL language program is the experimental class curriculum design, very correct, very easy to use.
traffic
- 交通灯，可以像日常上火中的交通灯那样实现倒数计时且进行显示指示-Traffic lights, like the traffic lights in the day-to-day lit as countdown displayed instructions
Audio_DAC_FIFO
- terasic的DM9000A模块源码，使用nios2做以太网应用的应该会用到-terasic the DM9000A module source, use nios2 do Ethernet applications should be used