资源列表
LPC2478FOOT
- 文件中有我做项目时，自己画的protel 99se 格式的ARM LPC2478 的封装 ，还有FPGA EP2C20的封装，其中还有一些封装我没列出来！比较多。-I made paper items, painting their own form of ARM LPC2478 protel 99se package, as well as FPGA EP2C20 package, of which there are some packages I have not listed! More
BALLGAME
- 一个小球游戏的VHDL设计 有需求的可以下载-A VHDL design of the ball game
led
- Led跑马灯verilog程序，可用作FPGA测试的第一个程序-Led Marquee verilog program
scad3
- this the SwitcherCAD III Overview book for vlsi design-this is the SwitcherCAD III Overview book for vlsi design.......
ASIC_Design_Flow_Tutorial
- this is asic design flow tutorial for vlsi design-this is asic design flow tutorial for vlsi design......
lift
- 本设计用VDHL实现了50层电梯的控制,实现的功能有（1）用LED显示电梯的行进过程,即用数码管显示电梯当前所在楼层的位置。 （2）在每层电梯的入口处有两个按钮上升请求(up)和下降请求(down)，按钮按下时则对应的LED亮。 （3)电梯到达了有请求的楼层之后，把门打开。停留15秒之后，把门关闭。 （4）电梯的运行遵循方向优先原则:当电梯处于上升模式时,只响应比电梯所在位置高的上楼请求信号,由下面上逐个执行,直到最后一个上楼请求执行完毕,如更高层有下楼请求则直接上升到有下楼请求的最
testLED
- spartan 3E上的跑马灯 verilog 可以直接跑通的-this is about testled about spartan 3e
16QAM
- This Verilog HDL file for 16 QAM mapper-This is Verilog HDL file for 16 QAM mapper
memory
- memory design vhdl code
FSM_3
- Final state machine written on VHDL in Quartus II. Imple. Implements the working principle of a sensor which detect the spinning direction (e.g. a motor) and depending on the direction a DuplexCounter is set to "up" or "down" mode.
CounterUni
- Universal counter written on VHDL in Quartus II. It counts up and down by taking into account overflow and onderrun bits.
Demultiplexer
- The code of implementation of a demultiplexer. Very useful to understand of working principle of demultiplexers.