资源列表
labview
- FSFSFSFSFSF GDGDGLABVIEW可以看看
uart_tx_and_rx
- A verilog code for UART transmitter and receiver system-A verilog code for UART transmitter and receiver system...
DE2_NIOS_HOST_MOUSE_VGA
- 该设计使用了Nios II系统来演示如何在DE2开发板上的USB主机端口连接到一个USB设备进行通信。本设计实现了一个单色显示屏，预加载的图像，用户可以利用它与鼠标。应连接到VGA端口，一个USB鼠标连接到USB主机端口和一个CRT/ LCD显示器。-This designs uses a Nios II system to demonstrate how to communicate with a USB device connected to the USB HOST port on the
uart_verilog
- 串口标准通讯，带奇偶校验和通讯超时故障，带测试文件-The serial standard communication with test files
PID-CPLD
- 文章描述是关于智能PID的CPLD实现形式，内容详实，极具参考价值-The article describes the CPLD on Intelligent PID forms of informative, has great reference value
DE2_Default
- DE2的默认例程：当电路板供电的，这样的设计是最初的设计。递增计数器显示值 7段显示器和发光二极管。也显示图像的VGA端口上。-This design is the initial design when the board is powered-up. It increments a counter and displays the value on the 7-segment displays and LEDs. An image is also displayed on the V
PERI4-DM9000A
- 基于FPGA的DM9000A芯片的网络数据采集系统，基于NIOS架构，c语言编程，资料齐全，包含不止5个源程序，绝对受用！-FPGA-based the DM9000A chip network data acquisition system based on NIOS architecture, c programming language, the information is complete, contains more than 5 source code is absolutely
anjianliushuideng
- 按键流水灯程序 cpld语言 程序包括源程序和图还有所建立的项目-Button light water program
ts1
- TigerSharc TS201总线接口逻辑-TigerSharc TS201 bus interface logic
vhdl
- starter-3E板载vga端口驱动，并显示800*640的图像-Using PICOBLAZE to control the VGA Display on the Spartan-3E Starter Board
FPGA-_control_DM9000A-Ethernet
- FPGA控制网口芯片DM9000A进行以太网传输数据。-The FPGA control network port chip the DM9000A Ethernet transmission data.
CRC_for_8023
- 基于802.3以太网协议的CRC校验程序，使用VHDL语言，4位数据并行执行-CRC inspection program based on the 802.3 Ethernet protocol, the use of VHDL, four data parallel execution