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  1. all_cpu

    0下载:
  2. 精简指令集CPU,可完成移位,跳转等简单功能,适用于FPGA学习,本代码使用verilog编写。-RISC CPU, to be completed by the shift, jumps and other simple functions for FPGA learning to write the code using verilog.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-09
    • 文件大小:1.8mb
    • 提供者:晓东
  1. cpu

    0下载:
  2. 该源码为之前上传的allcpu 的仿真代码testbench,使用modsim进行仿真。-The source code for previously uploaded allcpu simulation code testbench, use modsim simulation.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-23
    • 文件大小:226.46kb
    • 提供者:晓东
  1. i2c_verilog

    0下载:
  2. I2C Master IP 核 I2C is a two-wire, bi-directional serial bus that provides a simple and efficient method of data exchange between devices. It is most suitable for applications requiring occasional communication over a short distance between
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-16
    • 文件大小:11.11kb
    • 提供者:qingmingyang
  1. fast_fpga_code

    0下载:
  2. ELM算法实现分类,利用VHDL语言在FPGA开发板上实现。-Clasifaication based on Extreme Learing Machine
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-17
    • 文件大小:282kb
    • 提供者:李幽
  1. spi_latest.tar

    0下载:
  2. This IP provides specifications for the SPI (Serial Peripheral Interface) Master core. Synchronous serial interfaces are widely used to provide economical board-level interfaces between different devices such as microcontrollers, DACs, ADCs and other
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-12
    • 文件大小:2.5mb
    • 提供者:qingmingyang
  1. DE2Code

    0下载:
  2. 智能洗衣机控制器,能够实现洗衣,漂洗和脱水等功能,通过在DE2发板模拟实现.-Smart washing machine controller, to achieve laundry, rinsing and dehydration functions, DE2 development board through simulation.
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-09
    • 文件大小:1.73mb
    • 提供者:叶健
  1. acs

    0下载:
  2. This an ACS unit which can be used in log-map algorithm as well as viterbi algorithm-This is an ACS unit which can be used in log-map algorithm as well as viterbi algorithm
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-06
    • 文件大小:1.4mb
    • 提供者:arulananthan
  1. recursiveconvolutional

    0下载:
  2. This simple vhdl program of RSC encoder-This is simple vhdl program of RSC encoder
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-05-18
    • 文件大小:4.61mb
    • 提供者:arulananthan
  1. voda

    0下载:
  2. Water vending machine
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-17
    • 文件大小:378.99kb
    • 提供者:Dusica
  1. pci1

    0下载:
  2. 如果想为了以后的2k平台兼容就最好编wdm,因为windows2k不支持vxd,而且以后的发展wdm肯定要代替vxd了。不过由于我找到的资料基本上都是介绍vxd的,感觉vxd的技术好像更成熟一点,编的人更多一点,所以偷了一下懒(惭愧),就没有去研究wdm,就选择了vxd。-If you want to later edit 2k on the best platform compatible wdm, because windows2k not support vxd, wdm and futu
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-10
    • 文件大小:1.21kb
    • 提供者:luo
  1. ziliao

    0下载:
  2. 很大的数类,可以实现加减乘除取余数等等。很大的数类,可以实现加减乘除取余数-BigNumber class
  3. 所属分类:VHDL-FPGA-Verilog

    • 发布日期:2017-04-08
    • 文件大小:18.67kb
    • 提供者:凯狗
  1. NEW AUDIO CODEC DEVELOPMENT CODE BASE

    0下载:
  2. Hi friends, This consists of a complete system written in Verilog/TCL for VGA DISPLAY OF RESULTS INPUTTED THROUGH AUDIO CODEC AND COMPLETE SYSTEM LEVEL DESIGN ON VERILOG.
  3. 所属分类:VHDL编程

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