资源列表
Verilog
- 利用verilog 语言在ISE上运行仿真，利用BASY2开发板运行实现。-BASY2 engineered for ISE
gate4
- 运用verilog 语言编程，实现4输入逻辑门设计，利用ISE软件仿真，把程序下载到BASY2开发板上运行实现。-BASY2 engineered for ISE
FSM_parade
- 基于spartan6实现的交通灯有限状态机，项目来源是数字设计与计算机体系结构，中山大学移动信息工程学院学子必学项目-Based on the traffic lights to achieve spartan6 finite state machine, the project is a source of digital design and computer architecture, Sun Yat-sen Mobile Information Engineering School st
soda_machine_4seg
- soda machine，fpga经典项目，自动贩卖机，通过按键投币，四个七段译码管显示总钱数和找回的钱数-soda machine, fpga classic items, vending machines, coin operated by keys, four seven-segment decoder and display the total amount of money of money back
shift-register
- 四位移位寄存器，基于spartan6 fpga开发，移动信息工程学院学习必备，数字设计与计算机体系结构项目-Four shift registers based spartan6 fpga development, mobile learning essential information Engineering, Digital Design and Computer Architecture Project
adder_4
- 三种设计模式的加法器，分别是行为及描述，串行模式，并行模式。希望对大家了解加法器有帮助-Adder three design models, and behavior were described, the serial mode, the parallel mode. I hope to help everyone understand adder
fast-crc_latest.tar
- VERILOG Code for fast crs latest project
PingPong_Game_restored
- 基于FPGA的VGA兵乓球游戏设计，Verilog实现。-FPGA-based VGA table tennis game design, Verilog implementation.
Freq
- 这是一个频率计的程序代码，能检测信号的频率，已生成IP核，能直接在软件上仿真运行。-This is a frequency meter program code, can detect frequency signal generated IP core that can run directly on the simulation software.
PS2_Demo_Sys_restored
- PS/2的键盘编码、解码演示系统的设计，verilog实现。-Keyboard coded PS/2, and decoding demonstration system design, verilog achieved.
EDA
- 1602显示的数字钟 功能请详看文档 1602显示的数字钟 功能请详看文档-1602 clock 1602 clock 1602 clock
11
- 基础实验_01_多路复用器 ：4通道8位带三态输出-Experimental basis _01_ multiplexer: 4-channel 8 with a three-state output